STP

Using the Hierarchy Display



To use the Hierarchy Display to show and hide hierarchies of nodes in the SignalTap® II Logic Analyzer: 

  1. If you have not already done so, perform an analysis and synthesis, an analysis and elaboration, or a compilation on the design.

  2. If necessary, open a SignalTap II File (.stp), or create a new STP File.

  3. If you have not already done so, assign signals to the STP File.

  4. If you want, assign one signal as the SignalTap II Logic Analyzer clock.

  5. In the Hierarchy Display, click the + icon to expand the hierarchy of nodes, or click the - icon to collapse the hierarchy of nodes in the SignalTap II window.

  6. Turn off the node instances that you do not want to display in the SignalTap II Logic Analyzer.


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