See Also

CONV_STD_LOGIC_VECTOR conversion function:

ENTITY adder IS
   PORT (op1, op2 : IN UNSIGNED(7 DOWNTO 0);
         result   : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
         );
END adder;

ARCHITECTURE maxpld OF adder IS
BEGIN
   result <= CONV_STD_LOGIC_VECTOR(op1 + op2, 8);
END maxpld;